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Synplicity and Monterey Design Systems Link Tools for High-Productivity RTL to GDSII Design Flow
SUNNYVALE, Calif.--(BUSINESS WIRE)--June 4, 2001--Synplicity Inc.
(Nasdaq: SYNP), a leading supplier of software for the design and
verification of semiconductors, and Monterey Design Systems, a leading
provider of physical design solutions, today introduced a
high-productivity ASIC design flow intended to enable design
synthesis, physical prototyping and implementation In One Pass(TM).
This register transfer level (RTL) code to GDSII flow, which combines
Synplicity's new Synplify ASIC(TM) synthesis software, also announced
today(a), with Monterey's Sonar(TM) physical prototyping software and
Dolphin(TM) physical implementation software, can enable ASIC
designers to shave months off design time and determine timing closure
early in the design process. The companies plan to demonstrate the new
design flow in their respective suites at the Design Automation
Conference in Las Vegas later this month.
``Our relationship with Monterey Design Systems is a valued
partnership to provide a smooth interface between our new Synplify
ASIC software and products critical to the deep-submicron ASIC design
flow,'' said Andy Haines, vice president of marketing at Synplicity.
``Our two companies share a common mission -- to enable designer
productivity and speed time to market -- and we are pleased to team
with Monterey Design Systems, a technology leader in physical design
as demonstrated by its fast Sonar and Dolphin products. Together we
intend to deliver a complete design flow from RTL code to a final
GDSII output for manufacturing.''
Bill Alexander, vice president of marketing, Monterey Design
Systems, added, ``Productivity is a key issue facing designers today
and we're happy to partner with Synplicity to address this critical
problem. Synplicity's Synplify ASIC product runs up to 15 times faster
than other synthesis tools and has the ability to synthesize up to two
million gates at a time. Combining the Synplify ASIC product with our
Sonar and Dolphin products, we can provide a fast and complete flow
that will appeal to a large segment of the ASIC market.''
Complete RTL to GDSII Design Flow
The new design flow enables designers to determine timing closure
early in the design process, much more quickly than previously
possible with other synthesis and place and route flows. Using this
approach, designers enter RTL code into the Synplify ASIC product for
synthesis. Designers can then directly pass the Synplify ASIC
product-developed netlist into the Sonar software for early and rapid
identification of problems that would prevent successful completion of
physical design. Issues found in Sonar can be quickly resolved within
the Synplify ASIC software before performing final place and route
with the Dolphin product. This unique flow allows designers to achieve
timing closure without the need for multiple iterations between
synthesis and place and route or multiple iterations through place and
route. The combination of the quick runtimes offered by the Synplify
ASIC product with the early issue detection capabilities of the Sonar
software allows design sign-off in a fraction of a place and route
run-time. Dolphin accepts Sonar's physical prototype for fast and
manufacturing ready tape-out for mask-making.
Synplicity and Monterey Design have crafted the combined flow to
leverage each company's specific technology advantages. For example,
rapid scan insertion is accomplished within the Synplify ASIC
software, with optimization of the scan chain taking place within
physical design where factors such as clock and power routing can be
taken into account, thus enabling a ``best-of-breed'' test solution.
Additionally, Synplicity's HDL Analyst® graphical analysis tool
enables extensive design visualization throughout the design flow, and
can be cross-probed directly from files generated within Sonar and
Dolphin. In this way, physical implementation issues identified by
Sonar can be rapidly resolved within the Synplify ASIC software.
The companies plan to demonstrate this new design flow in their
suites at the Design Automation Conference, June 18-21, 2001 at the
Las Vegas Convention Center. To view a demonstration, please contact
either Synplicity at 408/215-6000 or Monterey Design Systems at
408/747-7370. Interested parties may also sign up for more information
on the demonstration by visiting http://www.synplicity.com or
http://www.montereydesign.com.
About Synplicity's Synplify ASIC Product
Synplify ASIC is the industry's first timing-driven ASIC synthesis
solution optimized to improve productivity for the majority of ASIC
designers. Leveraging Synplicity's proprietary synthesis algorithms
that have made Synplicity's FPGA synthesis and ASIC verification
products successful, the Synplify ASIC software provides a fast,
easy-to-use and powerful ASIC synthesis solution -- with runtimes up
to 15 times faster than traditional synthesis products. The Synplify
ASIC software also offers a unique ``top-down'' design methodology that
enables designers to perform timing-driven synthesis on up to
two-million-gate designs in a single operation, supporting matching
hierarchy and constraints in synthesis and place and route steps.
About Monterey Design Systems' Products
Monterey has developed highly integrated, yet open, leading
technology products that reduce the number of tools required in a
design flow to achieve extremely fast physical design implementation
of complex SoCs. Unlike existing physical design solutions, Dolphin's
In One Pass architecture solves the complex interdependencies among
SoC design factors by simultaneously exploring all aspects of the
physical design space. Sonar's physical prototyping allows rapid
validation of the design planning assumptions to achieve design
closure. To provide further productivity advantages to the market,
Monterey has pioneered System-Driven Physical Design(TM), a new
generation physical design solution that allows system-level design
constraints to be driven through to full chip implementation. This
top-down, correct by construction flow enables the company's customers
to implement their complex designs with fewer engineers and in a much
shorter time.
About Monterey Design Systems
Monterey Design Systems is the only System-Driven Physical Design
solution provider, giving customers the fastest and most advanced
System to GDSII approach for deep submicron SoC design. The company
combines superior technology in design planning, physical prototyping
and automated physical implementation to provide a revolutionary
physical design flow that begins at the system level and produces a
manufacturing ready layout. Leading semiconductor companies such as
LSI Logic (NYSE: LSI - news), STMicroelectronics (NYSE: STM - news),
Infineon Technologies (DAX/NYSE: IFX - news) and NEC Corporation
(Nasdaq: NIPNY - news) have adopted Monterey's innovative products to
dramatically increase their design productivity. Pioneering new
business models that align financial rewards to its customers' success
have attracted customers to the company's patented products. Monterey
Design Systems is privately held and backed by leading venture and
industrial investors. The company partners with leading EDA companies
such as Cadence (NYSE: CDN - news) and Synopsys (Nasdaq: SNPS - news)
to ensure interoperability in ASIC and COT design flows. Monterey
Design Systems is located at 894 Ross Drive, Sunnyvale, CA 94089-1443,
tel: 1.408.747.7370, fax: 1.408.747.7377,
http://www.montereydesign.com
About Synplicity
Synplicity, Inc. (Nasdaq: SYNP) is a leading provider of software
products that enable the rapid and effective design and verification
of semiconductors used in next-generation networking and
communications hardware and other electronic devices. The company
leverages its innovative logic synthesis, physical synthesis and
verification software solutions to improve performance and shorten
development time for complex programmable logic devices, application
specific integrated circuits (ASICs) and system-on-chip (SoC)
integrated circuits. Synplicity's fast, easy-to-use products offer
extremely high quality of results, support industry-standard design
languages (VHDL and Verilog) and run on popular platforms. As of the
end of March 2001, Synplicity employed over 230 people in its 16
facilities worldwide. Synplicity is headquartered in Sunnyvale, Calif.
Forward-looking Statement
This press release contains forward-looking statements. These
statements relate to future events and involve known and unknown
risks, uncertainties and other factors that may cause Synplicity's
levels of activity and product performance or achievements to differ
materially from those expressed or implied by the forward-looking
statements. In some cases, you will be able to identify forward
looking statements by terminology such as ``anticipates,'' ``intends,''
``may,'' ``will,'' ``expects,'' ``potential,'' ``continue'' or the negative of
these terms or other comparable terminology. Forward-looking
statements are only predictions and the actual events or results may
differ materially, particularly with respect to the continued
acceptance of Synplicity's existing products and the successful
introduction and widespread market acceptance of Synplicity's new
products and tools. For additional information and considerations
regarding the risks faced by Synplicity, see its Registration
Statement on Form S-1 and Form 10-K for the fiscal year ended December
31, 2000, as filed with the Securities and Exchange Commission, as
well as periodic reports on Forms 10-Q on file with the SEC. Although
Synplicity believes that the expectations reflected in the forward
looking statements are reasonable, Synplicity cannot guarantee future
results, levels of activity, performance or achievements. In addition,
neither Synplicity nor any other person assumes responsibility for the
accuracy and completeness of these forward-looking statements.
Synplicity disclaims any obligation to update information contained in
any forward-looking statement.
Note to Editors: Synplicity and HDL Analyst are registered
trademarks of Synplicity, Inc. Synplify ASIC is a trademark of
Synplicity. All other brands or products are the trademarks or
registered trademarks of their owners. In One Pass, Dolphin, Sonar and
Monterey Design Systems are trademarks of Monterey Design Systems.
(a) See additional press releases also announced today Complete RTL to
GDSII Design Flow
Contact:
Tsantes/Porter Novelli for Synplicity
Steve Gabriel, 408/369-1500 x27
steve@tsantes.com
or
Lee Public Relations for Monterey Design Systems
Wendy Truax, 503/672-9073
wendy@leepr.com
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